小誤差大失誤-阻值不匹配的非線性問題研究:R-2R 電阻網路 Modeling of Mismatch-Induced Nonlinearity in N-Stage R-2R Ladder Networks
Under Moore’s Law, devices keep getting smaller, yet manufacturing accuracy does not improve at the same rate. This makes resistor matching a key challenge in precision circuits. In this project, I studied how small resistor errors can cause large nonlinearity in an N-stage R–2R ladder DAC, and whether the behavior follows a clear structure instead of looking like “uncertainty.”
First, I measured many real resistors and described their value spread using statistical distributions. Next, I separated three error sources: (1) global uniform resistance variation, (2) local resistance-ratio mismatch between neighboring resistors, and (3) weight-ratio mismatch between the MSB and LSB segments. I then applied these errors to an R–2R ladder model and evaluated INL under different N-stage and segmentation settings.
The results show that global uniform variation changes INL only slightly, while resistance-ratio mismatch is the main cause of INL and creates clear segment-like patterns. These patterns remain similar as N increases, suggesting the nonlinearity is driven by local ratio structure rather than by global drift. Using a first-order approximation, I explain how small ratio deviations can grow into systematic INL trends. The observed error bounds and segmental behavior are consistent with IEEE-reported measurement observations. This work offers a practical way to predict and reduce mismatch-induced nonlinearity in scaled resistor-ladder DACs.